发明名称 |
Method to construct a 3D semiconductor device |
摘要 |
A method to construct a semiconductor device, the method including: forming a first mono-crystallized semiconductor layer; forming a second mono-crystallized semiconductor layer including mono-crystallized semiconductor transistors; where the second mono-crystallized semiconductor layer overlays the first mono-crystallized semiconductor layer, where the first mono-crystallized semiconductor layer includes an alignment mark and the transistors are aligned to the alignment mark, and where the first mono-crystallized semiconductor layer includes logic circuits, and connecting the logic circuits to an external device using input/output (I/O) circuits, where the input/output (I/O) circuits are constructed on the second mono-crystallized semiconductor layer. |
申请公布号 |
US8846463(B1) |
申请公布日期 |
2014.09.30 |
申请号 |
US201313902606 |
申请日期 |
2013.05.24 |
申请人 |
Monolithic 3D Inc. |
发明人 |
Or-Bach Zvi;Wurman Zeev |
分类号 |
H01L21/84;H01L21/8232 |
主分类号 |
H01L21/84 |
代理机构 |
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代理人 |
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主权项 |
1. A method to construct a semiconductor device, the method comprising:
forming a first layer comprising mono-crystallized semiconductor and first logic circuits; forming a second layer comprising a mono-crystallized semiconductor layer, said second layer overlying said first logic circuits; forming transistors on said second layer;
wherein said forming transistors comprises a lithography step, said lithography step comprises an alignment to said first layer, and connecting said first logic circuits to an external device using input/output (I/O) circuits, said input/output (I/O) circuits are constructed on said second mono-crystallized semiconductor layer. |
地址 |
San Jose CA US |