发明名称 Level shift switch and electronic device with the same
摘要 According to one embodiment, in a level shift switch, a first input signal is inputted into a first input-output terminal, a first output signal is outputted from a second input-output terminal, a second input signal is inputted into the second input-output terminal, a second output signal is outputted from the first input-output terminal. The level shift switch includes a transmission circuit, a first MOSFET, a second MOSFET, and a first one-shot pulse generation circuit.
申请公布号 US8847660(B2) 申请公布日期 2014.09.30
申请号 US201313941933 申请日期 2013.07.15
申请人 Kabushiki Kaisha Toshiba 发明人 Takiba Akira;Hori Chikahiro
分类号 H03L5/00 主分类号 H03L5/00
代理机构 White & Case LLP 代理人 White & Case LLP
主权项 1. A level shift switch, comprising: a transmission circuit including a first transistor, the transmission circuit configured to transmit a signal between a first input-output terminal and a second input-output terminal, one end of the first transistor connected to the first input-output terminal, the other end of the first transistor connected to the second input-output terminal; a second transistor having one end connected to a first power supply and the other end connected to the first input-output terminal; a third transistor having one end connected to a second power supply and the other end connected to the second input-output terminal; and a first one-shot pulse generation circuit including a fourth transistor and a fifth transistor, the first one-shot pulse generation circuit provided between the first input-output terminal and the second input-output terminal, the first one-shot pulse generation circuit configured to output a one-shot pulse signal to the second transistor and the third transistor, a first signal inputted into the fourth transistor not through a delay circuit but through the first input-output terminal, a second signal inputted into the fifth transistor, the second signal generated by delaying and inverting the first signal, the fifth transistor having one end to output a first one-shot pulse signal and the other end connected to the fourth transistor, wherein the first signal is generated by logically operating signal levels of the first input-output terminal and the second input-output terminal, and is inputted into a control terminal of the fourth transistor.
地址 Tokyo JP