发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device which reduces an influence of parasitic resistance of a gate electrode even when a TEG has a large area to enable measurement of characteristics of a gate insulation film with high accuracy; and provide a manufacturing method of the semiconductor device.SOLUTION: A semiconductor device comprises a TEG 100 for evaluation of a MOS formed on a silicon substrate 1. The TEG 100 includes: a gate insulation film 5 formed on the silicon substrate 1; a gate electrode 11 formed on the gate insulation film 5; board connection terminals 31, 32 electrically connected to positions of the silicon substrate 1, respectively, which are different from each other; and gate connection terminals 41, 42 electrically connected to positions of the gate electrode 11, respectively, which are different from each other.
申请公布号 JP2014183117(A) 申请公布日期 2014.09.29
申请号 JP20130055491 申请日期 2013.03.18
申请人 ASAHI KASEI ELECTRONICS CO LTD 发明人 FUJII SHUNTARO
分类号 H01L21/66;H01L21/336;H01L21/822;H01L27/04;H01L29/78 主分类号 H01L21/66
代理机构 代理人
主权项
地址