| 摘要 |
PROBLEM TO BE SOLVED: To provide a phase interpolator for a low-power transmitter, and an output waveform synthesis device employing an on-chip eye opening monitor (EOM) circuit.SOLUTION: In order to achieve a small area and low power consumption in transmitter design, a single-step multi-phase multiplexer is utilized which operates at a sub-rate. The multi-phase multiplexer comprises a parallel open drain NAND gate. In a sub-rate transmitter architecture, phase mismatching between multi-phase clock signals obviously reduces a jitter performance and is a serious bottleneck for spreading the sub-rate transmitter in spite of low power consumption. In order to solve such a mismatching problem, a waveform synthesis scheme based on a phase interpolator improving area and power efficiency is developed. |
