发明名称 INTEGRATED CIRCUITS AND METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH CAPPING LAYERS BETWEEN METAL CONTACTS AND INTERCONNECTS
摘要 Integrated circuits and methods for fabricating integrated circuits are provided. In an exemplary embodiment, a method for fabricating integrated circuits includes forming a metal contact structure that is electrically connected to a device. A capping layer is selectively formed on the metal contact structure, and an interlayer dielectric material is deposited over the capping layer. A metal hard mask is deposited and patterned over the interlayer dielectric material to define an exposed region of the interlayer dielectric material. The method etches the exposed region of the interlayer dielectric material to expose at least a portion of the capping layer. The method includes removing the metal hard mask with an etchant while the capping layer physically separates the metal contact structure from the etchant. A metal is deposited to form a conductive via electrically connected to the metal contact structure through the capping layer.
申请公布号 SG2013070388(A) 申请公布日期 2014.09.26
申请号 SG20130070388 申请日期 2013.09.18
申请人 GLOBALFOUNDRIES INC. 发明人 TORSTEN HUISINGA;CARSTEN PETERS;ANDREAS OTT;AXEL PREUSSE
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