| 发明名称 |
MEMORY CELL COMPRISING FIRST AND SECOND TRANSISTORS AND METHODS OF OPERATING |
| 摘要 |
<p>Semiconductor memory cells, array and methods of operating are disclosed. In one instance, a memory cell includes a bi-stable floating body transistor and an access device; wherein the bi-stable floating body transistor and the access device are electrically connected in series.</p> |
| 申请公布号 |
SG11201404871T(A) |
申请公布日期 |
2014.09.26 |
| 申请号 |
SGT11201404871 |
申请日期 |
2013.02.15 |
| 申请人 |
ZENO SEMICONDUCTOR, INC. |
发明人 |
WIDJAJA, YUNIARTO;HAN, JIN-WOO;LOUIE, BENJAMIN S. |
| 分类号 |
G11C11/40;H01L21/8239;H01L27/10 |
主分类号 |
G11C11/40 |
| 代理机构 |
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