发明名称 Manufacturing method of JFET semiconductor device and JFET semiconductor device
摘要 A manufacturing method of a junction field effect transistor includes the steps of: (a) forming an n + -type source layer on a surface of an n - -type drift layer formed on an n + -type SiC substrate; (b) forming a plurality of shallow trenches disposed at predetermined intervals by etching the surface of the n - -type drift layer with a silicon oxide film formed on the n - -type drift layer used as a mask; (c) forming an n-type counter dope layer by doping the n - -type drift layer below each of the shallow trenches with nitrogen by using a vertical ion implantation method; (d) forming a sidewall spacer on each sidewall of the silicon oxide film and the shallow trenches; and (e) forming a p-type gate layer by doping the n - -type drift layer below each of shallow trenches with aluminum by using the vertical ion implantation method.
申请公布号 EP2782122(A2) 申请公布日期 2014.09.24
申请号 EP20140160755 申请日期 2014.03.19
申请人 RENESAS ELECTRONICS CORPORATION 发明人 KAGOTOSHI, YASUAKI;ARAI, KOICHI;YOKOYAMA, NATSUKI;SHIMIZU, HARUKA
分类号 H01L21/337;H01L29/808 主分类号 H01L21/337
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