发明名称 |
SYSTEM AND METHOD FOR FILTRATION OF ERROR REPORTS RESPECTIVE OF STATIC AND QUASI-STATIC SIGNALS WITHIN AN INTEGRATED CIRCUIT DESIGN |
摘要 |
A system and method identify potentially static and/or quasi-static signals within an integrated circuit (IC), or portion thereof. Static and quasi-static signals may be identified in a design description of the IC by any one or more of: (1) a fan-out size exceeding some threshold, (2) a toggle frequency in a simulation trace that is below some threshold, and (3) a signal name that appears in a list accessed from the memory. Identification of static and quasi-static signals is performed, typically, as part of a verification process in order to flag cases where the verification system would otherwise indicate an error (e.g., at a clock domain crossing). Identifying a signal of the IC as being static or quasi-static improves the quality of results of verification and makes it easier for a prospective user to concentrate on actual rather than spurious issues reported during verification. |
申请公布号 |
US2014282322(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201313872303 |
申请日期 |
2013.04.29 |
申请人 |
ATRENTA, INC. |
发明人 |
Sarwary Mohamed Shaker;Mneimneh Maher;Jain Paras Mal;Movahed-Ezazi Mohammad H.;Binois Jean P. |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
1. A method implemented in a computing system for identification of static signals or quasi-static signals of a circuit, the method comprising:
receiving a description of the design of at least a portion of the circuit; identifying from the received description any one or more signals having a specified characteristic of a static signal or a quasi-static signal; and storing a listing in a memory of any such identified signal. |
地址 |
San Jose CA US |