发明名称 MEMORY DEVICE
摘要 According to one embodiment, during a transition to and from a state assumed while a signal is being received from outside a memory device at the terminal, a first pre-driver outputs a first signal which transitions at a lower rate than that during a transition to and from a state assumed while a signal is being output to outside the memory device at the terminal. During a transition to and from a state assumed while a signal is being received from outside the memory device at the terminal, a second pre-driver outputs a second signal which transitions at a lower rate than that during a transition to and from a state assumed while a signal is being output to outside the memory device at the terminal.
申请公布号 US2014269116(A1) 申请公布日期 2014.09.18
申请号 US201313960440 申请日期 2013.08.06
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MATSUOKA Fumiyoshi
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
主权项 1. A memory device comprising: memory cells, a first driver coupled to a terminal and driven by a first signal; a second driver coupled to the terminal and driven by a second signal; a first pre-driver which receives a third signal based on data from the memory cells while a signal is being output to outside the memory device at the terminal,outputs the first signal in accordance with the third signal, andduring a transition to and from a state assumed while a signal is being received from outside the memory device at the terminal, outputs the first signal which transitions at a lower rate than that during a transition to and from a state assumed while a signal is being output to outside the memory device at the terminal; and a second pre-driver which receives a fourth signal based on data from the memory cells while a signal is being output to outside the memory device at the terminal,outputs the second signal in accordance with the fourth signal, andduring a transition to and from a state assumed while a signal is being received from outside the memory device at the terminal, outputs the second signal which transitions at a lower rate than that during a transition to and from a state assumed while a signal is being output to outside the memory device at the terminal.
地址 Tokyo JP