发明名称 FLASH MEMORY TECHNIQUES FOR RECOVERING FROM WRITE INTERRUPT RESULTING FROM VOLTAGE FAULT
摘要 Techniques, related to a flash memory device having a non-volatile memory array (NVM), for recovering from a write interrupt resulting from host-supplied memory voltage fault are disclosed. A memory controller is configured to control a response to an occurrence of the write-interrupt, the response including writing to the NVM, after the memory voltage is verified as being within an acceptable range, one or more of a safe copy of a portion of a first sector of upper-page data and a safe copy of a portion of a second sector of lower-page data, and terminating the write interrupt. Terminating the write-interrupt may include receiving new data from the host while avoiding sending an error message to the host.
申请公布号 US2014281683(A1) 申请公布日期 2014.09.18
申请号 US201313841180 申请日期 2013.03.15
申请人 SANDISK TECHNOLOGIES INC. 发明人 Dusija Gautam;Huang Jianmin;Avila Chris N.;Shah Grishma S.;Chen Yi-Chieh;Mak Alexander K.;Moogat Farookh
分类号 G06F11/10 主分类号 G06F11/10
代理机构 代理人
主权项 1. A memory device comprising: a memory controller; a non-volatile memory array for storing page data, the page data comprising upper-page data and lower-page data; an on-chip cache configured to concurrently retain, until a first sector of upper-page data and a second sector of lower-page data are confirmed as written, a safe copy of at least a portion of the first sector of upper-page data and a safe copy of at least a portion of the second sector of lower-page data to be written to a respective group of cells of the memory array; a host interface communicatively coupled with the memory controller and the non-volatile memory array, the host interface configured to accept a memory voltage supplied by a host for writing data to the non-volatile memory array; wherein, the memory controller is configured to control a response to an occurrence of a write-interrupt resulting from a voltage fault in the memory voltage, the response comprising: writing to the non-volatile memory array, after the memory voltage is verified as being within an acceptable range, one or more of the safe copy of the portion of the first sector of upper-page data and the safe copy of the portion of the second sector of lower-page data; andterminating the write-interrupt.
地址 Plano TX US