发明名称 SEMICONDUCTOR CHIP WITH POWER GATING THROUGH SILICON VIAS
摘要 A semiconductor chip includes a substrate having a frontside and a backside coupled to a ground. The chip includes a circuit in the substrate at the frontside. A through silicon via (TSV) having a front-end, a back-end, and a lateral surface is included. The back-end and lateral surface of the TSV are in the substrate, and the front-end of the TSV is substantially parallel to the frontside of the substrate. The chip also includes an antifuse material deposited between the back-end and lateral surface of the TSV and the substrate. The antifuse material insulates the TSV from the substrate. The chip includes a ground layer insulated from the substrate and coupled with the TSV and the circuit. The ground layer conducts a program voltage to the TSV to cause a portion of the antifuse material to migrate away from the TSV, thereby connecting the circuit to the ground.
申请公布号 US2014264332(A1) 申请公布日期 2014.09.18
申请号 US201313803895 申请日期 2013.03.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Erickson Karl R.;Paone Phil C.;Paulsen David P.;Sheets, II John E.;Uhlmann Gregory J.;Williams Kelly L.
分类号 H01L21/66 主分类号 H01L21/66
代理机构 代理人
主权项 1. A semiconductor chip comprising: a semiconductor substrate having a frontside surface and a backside surface, the backside surface being coupled to a ground; a functional circuit in the semiconductor substrate at the frontside surface, the functional circuit electrically isolated from the semiconductor substrate; a through silicon via (TSV) having a front-end surface, a back-end surface, and a lateral surface, the back-end surface and lateral surface of the TSV being in the semiconductor substrate, and the front-end surface of the TSV being substantially parallel to the frontside surface of the semiconductor substrate; an antifuse material deposited between the back-end and lateral surfaces of the TSV and the semiconductor substrate, the antifuse material being configured to insulate the TSV from the semiconductor substrate; and a functional ground layer insulated from the semiconductor substrate, and electrically coupled with the TSV, and the functional circuit, wherein the functional ground layer is configured to conduct a program voltage to the TSV to cause a portion of the antifuse material to migrate away from the TSV, thereby electrically connecting the functional circuit to the ground.
地址 Armonk NY US