发明名称 2T and flash memory array
摘要 <p>A flash memory array includes memory sectors of two transistors (2T) AND memory cells (S(1,1,1), A(1,1,1) transistors). Within each of the memory sectors (104-1, 104-2), a row of sector selection transistors (SSTL1, SSTL2) is configured such that writing data onto a memory column within the memory sector is controlled by applying a voltage to a bit line (BL1, BL2, BL3), independent from the row of sector selection transistors.</p>
申请公布号 EP2779173(A2) 申请公布日期 2014.09.17
申请号 EP20140157024 申请日期 2014.02.27
申请人 NXP B.V. 发明人 VAN DUUREN, MICHIEL JOS;STORMS, MAURITS MARIO NICOLAAS;VAN BUSSEL, ERIK MARIA
分类号 G11C11/56;G11C7/18;G11C16/04;G11C16/24 主分类号 G11C11/56
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