| 发明名称 |
Access buffer |
| 摘要 |
The disclosed embodiments relate to a system for controlling accesses to one or more memory devices. This system includes one or more write queues configured to store entries for write requests, wherein a given entry for a write request includes an address and write data to be written to the address. The system also includes a search mechanism configured to receive a read request which includes an address, and to search the one or more write queues for an entry with a matching address. If a matching address is found in an entry in a write queue, the search mechanism is configured to retrieve the write data from the entry and to cancel the associated write request, whereby the read request can be satisfied without accessing the one or more memory devices. |
| 申请公布号 |
US8838853(B2) |
申请公布日期 |
2014.09.16 |
| 申请号 |
US201113005479 |
申请日期 |
2011.01.12 |
| 申请人 |
Marvell International Ltd. |
发明人 |
Sukonik Vitaly;Livne Sarig |
| 分类号 |
G06F3/00;G06F13/28;G06F13/00;G06F5/00 |
主分类号 |
G06F3/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus for controlling accesses to one or more memory devices, comprising:
one or more write queues configured to store entries for write requests, wherein a given entry for a write request includes an address and write data to be written to the address; and a search mechanism configured to receive a read request which includes an address, and to search the one or more write queues for an entry with a matching address; wherein if a matching address is found in an entry in a write queue, the search mechanism is configured to retrieve the write data from the entry and to cancel the associated write request before completion, whereby the read request can be satisfied without accessing the one or more memory devices. |
| 地址 |
Hamilton BM |
