发明名称 Image display apparatus and image display method
摘要 An image display apparatus includes a display section having a pixel unit included in a layout of a pixel matrix and provided with a memory unit used for storing a logic level of input image data; a vertical driving section for asserting a scan signal on a scan line provided for the display section; and a horizontal driving section for asserting a driving signal according to the input image data on a signal line provided for the display section.
申请公布号 US8836629(B2) 申请公布日期 2014.09.16
申请号 US200812075871 申请日期 2008.03.15
申请人 Japan Display, Inc. 发明人 Teranishi Yasuyuki;Nakajima Yoshiharu;Itakura Naoyuki;Nakanishi Takayuki;Kida Yoshitoshi
分类号 G09G3/36;G09G3/20 主分类号 G09G3/36
代理机构 The Chicago Technology Law Group, LLC 代理人 Depke Robert J.;The Chicago Technology Law Group, LLC
主权项 1. An image display apparatus comprising: a display section having a pixel unit with a memory unit for storing a logic level of image data, and a signal line for supplying image data to said pixel unit; wherein an operation to drive said pixel unit is switched from an analog driving mode to a memory mode and vice versa, in said analog driving mode, an analog image data signal is input to said pixel unit through said signal line and a gradation of said pixel unit is set at a value according to a level of said analog image signal, in said memory mode, a logic level of image data is input to said pixel unit through said signal line and is stored in said memory unit, said memory unit is connected to said pixel unit in order to set the gradation of said pixel unit at a value according to said logic level of said image data, a switch circuit for connecting said memory unit to said pixel unit in said memory mode is also used as a switch circuit for connecting said signal line to said pixel unit in said analog driving mode, and further wherein the switch circuit has an input that alternately receives a signal from the memory unit or an analog drive signal, each of which is transferred via the signal line, in the memory mode, a signal with a pre-charge level is initially applied to the memory unit via the signal line, and upon writing in the memory mode, a reversed-phase signal is applied to the switch circuit, while a normal-phased drive signal is applied to the drive line extending in a direction orthogonal to the signal line to connect the signal line with the pixel unit, so that the pre-charge level is written into the pixel unit.
地址 Chita JP