Analog circuit and display device and electronic device

摘要

The invention provides an analog circuit that decreases an effect of variation of a transistor. By flowing a bias current in a compensation operation, a voltage between the gate and source of the transistor to be compensated is held in a capacitor. In a normal operation, the voltage stored in the compensation operation is added to a signal voltage. As the capacitor holds the voltage according to the characteristics of the transistor to be compensated, the effect of variation can be decreased by adding the voltage stored in the capacitor to the signal voltage. Further, an analog circuit which decreases the effect of variation can be provided by applying the aforementioned basis to a differential circuit, an operational amplifier and the like.

主权项

1. An electronic device comprising:
a first wiring configured to be supplied with a first voltage; a second wiring configured to be supplied with a second voltage; a third wiring; an input terminal; an output terminal; a first switch; a second switch; a third switch; a fourth switch; a fifth switch; a sixth switch; a seventh switch; a eighth switch; a first transistor; a second transistor; a first capacitor; and a second capacitor, wherein a first terminal of the first switch is electrically connected with the first wiring, wherein a second terminal of the first switch is directly connected with a first terminal of the first transistor, wherein a second terminal of the first transistor is directly connected with a first terminal of the second transistor, wherein a second terminal of the second transistor is directly connected with the second wiring, wherein a first terminal of the fourth switch is directly connected with the third wiring, wherein a second terminal of the fourth switch is directly connected with a gate of the first transistor and a first terminal of the first capacitor, wherein a first terminal of the fifth switch is directly connected with the input terminal, wherein a second terminal of the fifth switch is directly connected with a first terminal of the sixth switch and a second terminal of the first capacitor, wherein a second terminal of the sixth switch is directly connected with the second terminal of the first transistor and a first terminal of the eighth switch, wherein a second terminal of the eighth switch is directly connected with a first terminal of seventh switch and a first terminal of the second capacitor, wherein a first terminal of the second switch is directly connected with a first terminal of the third switch, and wherein a second terminal of the third switch is directly connected with the output terminal.