METHOD AND APPARATUS FOR ANALYZING MEMORY ARCHITECTURE

摘要

A technique relating to a method and an apparatus to analyze the architecture of a multi-bank memory is disclosed. A method to analyze the architecture of a memory consisting of multi-banks comprises the steps of: accessing the memory in a cache line unit in accordance to at least one memory address; calculating operation processing time for data corresponding to at least one memory address by accessing the memory in the cache line unit; and determining the architecture of the memory based on the calculated operation processing time. Therefore, the architecture of the memory can easily be analyzed by sequentially accessing the multi-bank memory using a cache line as a unit, and analyze the pattern of operation processing time. This causes a low buffer drive to be minimized, thereby improving the performance of the overall system.