| 发明名称 |
DATA CIRCUIT |
| 摘要 |
A circuit includes a first plurality of memory cells coupled with a first data line and a first data transfer circuit coupled with the first data line and a second data line. In a first operation mode of the circuit, the first data line is left floating and is caused to have a first logical value by a current in at least one memory cell of the first plurality of memory cells. In a second operation mode of the circuit, the first data line is configured to reflect data stored in a memory cell of the plurality of memory cells, and the second data line is configured to reflect the data on the first data line through the first data transfer circuit. |
| 申请公布号 |
US2014254289(A1) |
申请公布日期 |
2014.09.11 |
| 申请号 |
US201313791258 |
申请日期 |
2013.03.08 |
| 申请人 |
Company, Ltd. Taiwan Semiconductor Manufacturing |
发明人 |
WANG Bing |
| 分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A circuit comprising:
a first plurality of memory cells coupled with a first data line; and a first data transfer circuit coupled with the first data line and a second data line, wherein
in a first operation mode of the circuit, the first data line is left floating and is caused to have a first logical value by a current in at least one memory cell of the first plurality of memory cells; andin a second operation mode of the circuit, the first data line is configured to reflect data stored in a memory cell of the plurality of memory cells, and the second data line is configured to reflect the data on the first data line through the first data transfer circuit. |
| 地址 |
US |
