发明名称 SEMICONDUCTOR STORAGE DEVICE AND DRIVING METHOD THEREOF
摘要 A memory includes a cell array including nonvolatile memory cells. A power generator generates a power supply voltage for driving the cell array. A receiver receives a command and an address. A controller controls an active state of the cell array, the power generator, and the receiver. In an activation mode, the cell array, the power generator, and the receiver are turned into the active states. In a first power saving mode, the cell array, the power generator, and the receiver are turned into inactive states. In a second power saving mode, the cell array and the power generator are turned into the active states, and the receiver is turned into the inactive state. In a third power saving mode, at least a part of the power generator is turned into the active state, and the cell array and the receiver are turned into the inactive states.
申请公布号 US2014254254(A1) 申请公布日期 2014.09.11
申请号 US201414281433 申请日期 2014.05.19
申请人 Kabushiki Kaisha Toshiba 发明人 KATAYAMA Akira;HOYA Katsuhiko;RYU Keiichi;TAKAGI Yasuharu
分类号 G11C14/00;G11C5/14 主分类号 G11C14/00
代理机构 代理人
主权项 1. A semiconductor storage device comprising: a memory cell array comprising a plurality of nonvolatile memory cells; a power generator configured to generate a power supply voltage for driving the memory cell array; a first receiver configured to receive a command and an address for controlling the memory cell array; and a controller configured to control each of the memory cell array, the power generator, and the first receiver according to the command and the address, wherein the device has an activation mode of turning the memory cell array, the power generator, and the first receiver into the active states; a first power saving mode of turning the memory cell array, the power generator, and the first receiver into inactive states; a second power saving mode of turning the memory cell array and the power generator into the active states and turning the first receiver into the inactive state; and a third power saving mode of turning at least a part of the power generator into the active state and turning the memory cell array and the first receiver into the inactive states.
地址 Minato-ku JP
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