发明名称 Parasitic antenna array design for microwave frequencies
摘要 The present invention is load circuit for a parasitic antenna element of a parasitic antenna array. The load circuit may include a DC bias current source, a resistor connected to the DC bias current source, one or more capacitors connected to the resistor, and multiple (ex. —two) diodes connected to the parasitic antenna element. The first diode may be configured for directly connecting the parasitic element to a ground plane of the parasitic antenna array. The second diode may be configured for connecting the parasitic element to the ground plane via the one or more capacitors. The load circuit may be configured for providing a variable (ex. —adjustable) impedance to the parasitic antenna array.
申请公布号 US8830132(B1) 申请公布日期 2014.09.09
申请号 US201012729372 申请日期 2010.03.23
申请人 Rockwell Collins, Inc. 发明人 Doane Jonathan P.;McCoy Bryan S.;Cripe David W.
分类号 H01Q9/00 主分类号 H01Q9/00
代理机构 代理人 Suchy Donna P.;Barbieri Daniel M.
主权项 1. A parasitic antenna array, comprising: a substrate, the substrate including a first surface and a second surface, the second surface being disposed generally opposite the first surface; a monopole element, the monopole element being connected to the substrate, the monopole element configured for radiating electromagnetic energy in an omni-directional radiation pattern; a ground plane, the ground plane being directly connected to and located on and in proximity to the second surface of the substrate; a plurality of parasitic elements, the plurality of parasitic elements being connected to the substrate and extending from the second surface of the substrate, through the substrate and out of the first surface of the substrate; and a plurality of load circuits, the plurality of load circuits being connected to the plurality of parasitic elements, the plurality of load circuits further being directly connected to the ground plane, the plurality of load circuits and the ground plane being in proximity to the second surface of the substrate, each load circuit of the plurality of load circuits including a first diode connected to a parasitic element of the plurality of parasitic elements to the ground plane and a second diode connected to the parasitic element and a capacitor, the capacitor connected to the ground plane.
地址 Cedar Rapids IA US