Semiconductor device having compensation capacitance

摘要

Disclosed herein is a device that includes: first and second memory mats each including a plurality of bit lines; a sense area arranged between the first and second memory mats; a column selection line provided on the first memory mat; and a compensation capacitance provided on the second memory mat. The sense area includes a plurality of sense amplifiers. Each of the sense amplifiers is connected to an associated one or ones of the bit lines. At least one of the sense amplifiers is selected based on a column selection signal supplied via the column selection line. At least a part of the compensation capacitance is formed in a same wiring layer as the column selection line.

主权项

1. A semiconductor device comprising:
a plurality of memory mats arranged in a first direction; a plurality of sense areas each arranged between two of the memory mats, each of the sense areas including a plurality of sense amplifiers selected based on a column selection signal; a column decoder generating the column selection signal; a column selection line extending in the first direction on the memory mats and supplying the column selection signal from the column decoder to the sense areas; and a compensation capacitance provided on one of the memory mats which is located farther than the other of the memory mats from the column decoder, wherein the compensation capacitance includes a first capacitance electrode to which a first power source potential is supplied and a second capacitance electrode to which a second power source potential is supplied, and at least one of the first and second capacitance electrodes is formed in a same wiring layer as the column selection line.