发明名称 Sub page and page memory management apparatus and method
摘要 A method and apparatus for managing a virtual address to physical address translation utilize a subpage level fault detecting and access. The method and apparatus may also use an additional subpage and page store Non-Volatile Store (NVS). The method and apparatus determines whether a page fault occurs or whether a subpage fault occurs to effect an address translation and also operates such that if a subpage fault had occurred, a subpage is loaded corresponding to the fault from a NVS to a DRAM, such as DRAM or any other suitable volatile memory historically referred to as main memory. The method and apparatus, if a page fault has occurred, determines if a page fault has occurred without operating system assistance and is a hardware page fault detection system that loads a page corresponding to the fault from NVS to DRAM.
申请公布号 US8832382(B2) 申请公布日期 2014.09.09
申请号 US201113332853 申请日期 2011.12.21
申请人 ATI Technologies ULC 发明人 Mayhew David E.;Hummel Mark
分类号 G06F12/12 主分类号 G06F12/12
代理机构 Faegre Baker Daniels LLP 代理人 Faegre Baker Daniels LLP
主权项 1. A method for managing a virtual address to physical address translation comprising: determining whether a page fault or sub-page fault has occurred to effect an address translation; if a sub-page fault has occurred, loading a sub-page corresponding to the fault from non-volatile storage (NVS) to dynamic random access memory (DRAM); and if a page fault has occurred, loading a page corresponding to the fault from NVS to DRAM.
地址 Markham, Ontario CA