发明名称 Quadrature error compensating circuit
摘要 According to one embodiment, a quadrature error compensating circuit for acquiring an in-phase component signal and a quadrature component signal, includes a first filter, a first multiplier, a first subtractor, a second filter, a correlation calculating circuit. The first multiplier multiplies the in-phase component signal by a control value. The correlation calculating circuit calculates a cross-correlation value between an output of the first filter and an output of the second filter, and uses the cross-correlation value as the control value.
申请公布号 US8831153(B2) 申请公布日期 2014.09.09
申请号 US201213724277 申请日期 2012.12.21
申请人 Kabushiki Kaisha Toshiba 发明人 Okuni Hidenori;Matsuno Junya;Kasami Hideo;Kogawa Tsuyoshi
分类号 H03D1/00;H04L27/06;H04L27/38 主分类号 H03D1/00
代理机构 Holtz Holtz Goodman & Chick PC 代理人 Holtz Holtz Goodman & Chick PC
主权项 1. A quadrature error compensating circuit for acquiring an in-phase component signal and a quadrature component signal, the circuit comprising: a first filter configured to pass therethrough only a first low-band signal component of a frequency lower than a first frequency, wherein the first low-band signal component is included in the in-phase component signal; a first multiplier configured to multiply the in-phase component signal by a control value; a first subtractor configured to subtract an output of the first multiplier from the quadrature component signal; a second filter configured to pass therethrough only a second low-band signal component of a frequency lower than a second frequency, wherein the second low-band signal component is included in an output of the first subtractor; and a correlation calculating circuit configured to calculate, as the control value, a cross-correlation value between an output of the first filter and an output of the second filter; wherein the first frequency is included in a signal band of the in-phase component signal and the second frequency is included in a signal band of the quadrature component signal; and wherein the correlation calculating circuit comprises a first correlation calculation multiplier configured to multiply the output of the first filter by the output of the second filter, and an integrator configured to integrate an output of the first correlation calculation multiplier.
地址 Tokyo JP