发明名称 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
摘要 According to one embodiment, a nonvolatile semiconductor memory device includes: a plurality of first semiconductor regions; a plurality of control gate electrodes; a charge storage layer; a first insulating film provided between the charge storage layer and first semiconductor regions; a second insulating film provided between the charge storage layer and control gate electrodes; and an element isolation region provided between the plurality of first semiconductor regions, and the element isolation region being in contact with the first insulating film and a first portion of the charge storage layer on the first insulating film side. Each of the plurality of control gate electrodes is in contact with a second portion other than the first portion of the charge storage layer. The charge storage layer includes a silicon-containing layer in contact with the first insulating film and a silicide-containing layer provided on the silicon-containing layer.
申请公布号 US2014246717(A1) 申请公布日期 2014.09.04
申请号 US201314018515 申请日期 2013.09.05
申请人 Kabushiki Kaisha Toshiba 发明人 AISO Fumiki
分类号 H01L27/115 主分类号 H01L27/115
代理机构 代理人
主权项 1. A nonvolatile semiconductor memory device comprising: a plurality of first semiconductor regions extending in a first direction, and the plurality of first semiconductor regions being arranged in a direction crossing the first direction; a plurality of control gate electrodes provided on an upper side of the plurality of first semiconductor regions, the plurality of control gate electrodes extending in a second direction different from the first direction, and the plurality of control gate electrodes being arranged in a direction crossing the second direction; a charge storage layer provided in a position, and each of the plurality of first semiconductor regions and each of the plurality of control gate electrodes cross in the position; a first insulating film provided between the charge storage layer and each of the plurality of first semiconductor regions; a second insulating film provided between the charge storage layer and each of the plurality of control gate electrodes; and an element isolation region provided between adjacent ones of the plurality of first semiconductor regions, and the element isolation region being in contact with the first insulating film and a first portion of the charge storage layer on the first insulating film side, each of the plurality of control gate electrodes being in contact with a second portion other than the first portion of the charge storage layer via the second insulating film, the charge storage layer including a silicon-containing layer in contact with the first insulating film and a silicide-containing layer provided on the silicon-containing layer.
地址 Minato-ku JP