发明名称 CLOCK GENERATION CIRCUIT, PROCESSOR SYSTEM USING SAME, AND CLOCK FREQUENCY CONTROL METHOD
摘要 A microcomputer includes a register that stores division ratio setting information, a frequency divider that determines first and second division ratios based on the division ratio setting information, frequency-divides a first clock having a first frequency at the first division ratio, and frequency-divides a second clock having a second frequency at the second division ratio, and a CPU. The first and second division ratios are determined in such a manner that a frequency of the first clock that is frequency-divided at the first division ratio and a frequency of the second clock that is frequency-divided at the second division ratio are made equal to each other.
申请公布号 US2014247074(A1) 申请公布日期 2014.09.04
申请号 US201414274326 申请日期 2014.05.09
申请人 Renesas Electronics Corporation 发明人 MATSUSHITA Rumi
分类号 H03K3/012;H03K21/00 主分类号 H03K3/012
代理机构 代理人
主权项 1. A microcomputer comprising: a register that stores division ratio setting information; a frequency divider that determines first and second division ratios based on the division ratio setting information, frequency-divides a first clock having a first frequency at the first division ratio, and frequency-divides a second clock having a second frequency at the second division ratio; and a CPU (Central Processing Unit), wherein the first and second division ratios are determined in such a manner that a frequency of the first clock that is frequency-divided at the first division ratio and a frequency of the second clock that is frequency-divided at the second division ratio are made equal to each other.
地址 Kawasaki-shi JP