MICROELECTRONIC PACKAGE WITH CONSOLIDATED CHIP STRUCTURES

摘要

A chip package has multiple chips (22, 42)that may be arranged side by side or in a staggered, stair step arrangement. The contacts (36, 56) of the chips are connected to interconnect pads (60) carried on the chips themselves or on a redistribution interposer (402). The interconnect pads desirably are arranged in a relatively narrow interconnect zone (62), such that the interconnect pads can be readily wire bonded or otherwise connected to a package substrate.