发明名称 Electric compressor
摘要 An electric compressor, wherein an inverter device, which controls the operation of an electric motor by commands from an external control unit, is provided with a drive IC which computes drive signals of the electric motor based on the same, a switching circuit which converts the drive signals to rotation control signals of the electric motor, and an output signal control IC which cuts off input of the drive signals to the switching circuit at the time of an abnormality and wherein, furthermore, the drive IC is provided with a comparator which compares drive signals which are input to the switching circuit and computed values of the drive signals at a control unit inside the drive IC and, when the drive signals and the computed values do not match, the comparator makes the output signal control IC cut off input of the drive signals to the switching circuit.
申请公布号 US8823292(B2) 申请公布日期 2014.09.02
申请号 US201213397889 申请日期 2012.02.16
申请人 DENSO CORPORATION 发明人 Sumi Tomoyuki;Amano Hiroshi
分类号 H02P1/54;H02P5/74 主分类号 H02P1/54
代理机构 Posz Law Group, PLC 代理人 Posz Law Group, PLC
主权项 1. An electric compressor comprising: an electric motor which operates said compressor; an external control unit which outputs commands for controlling the operation of said electric motor; and an inverter device which controls the operation of said electric motor which operates said compressor by commands from said external control unit provided with a drive circuit which uses an arithmetic logic unit to compute drive signals to said electric motor from said commands, a switching circuit which converts said drive signals to rotation control signals of said electric motor, and a cutoff circuit which cuts off input of said drive signals to said switching circuit at the time of an abnormality, said inverter device further comprising: a logic error detector which detects a logic error of the computed results of said drive signals at said arithmetic logic unit; and said logic error detector outputs an output cutoff signal to said cutoff circuit to cut off input of said drive signals to said switching circuit when there is a logic error in the computed results of said drive signals at said arithmetic logic unit.
地址 Kariya JP