| 发明名称 |
Bump-on-Trace Methods and Structures in Packaging |
| 摘要 |
A method and structure for bump-on-trace bonding is provided. In an embodiment traces to be used for bump-on-trace (BOT) bonding are protected during a pre-solder treatment. The pre-solder treatment improves the adhesion between the exposed traces (e.g., the non-BOT traces) and a solder resist layer. |
| 申请公布号 |
US2014239505(A1) |
申请公布日期 |
2014.08.28 |
| 申请号 |
US201313781215 |
申请日期 |
2013.02.28 |
| 申请人 |
Company, Ltd. Taiwan Semiconductor Manufacturing |
发明人 |
Wu Jiun Yi |
| 分类号 |
H01L23/00;H01L23/538 |
主分类号 |
H01L23/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method of forming an electrical device, the method comprising:
providing a first substrate having a first trace and a second trace; forming a mask over the first trace; treating the second trace while the first trace is protected by the mask, the treating forming a treated portion of the second trace; removing the mask; and forming a protective layer directly over the treated portion of the second trace. |
| 地址 |
US |
