发明名称 PROCESS OF ULTRA THICK TRENCH ETCH WITH MULTI-SLOPE PROFILE
摘要 The present disclosure relates to an integrated chip (IC) having an ultra-thickmetal layer formed in a metal layer trench having a rounded shape that reduces stress between an inter-level dielectric (ILD) layer and an adjacent metal layer, and a related formation method. In some embodiments, the IC has an inter-level dielectric layer disposed above a semiconductor substrate. The ILD layer has a cavity with a sidewall having a plurality of sections, wherein respective sections have different slopes that enable the cavity to have a rounded shape. A metal layer is disposed within the cavity. The rounded shape of the cavity reduces stress between the ILD layer and the metal layer to prevent cracks from forming along an interface between the ILD layer and the metal layer.
申请公布号 KR20140103801(A) 申请公布日期 2014.08.27
申请号 KR20130066582 申请日期 2013.06.11
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 HSUEH CHIH HUNG;WANG WEI TE;CHEN SHAO YU;FAN CHUN LIANG;TSAI KUAN CHI
分类号 H01L27/02;H01L21/31 主分类号 H01L27/02
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