发明名称 Image forming apparatus, image forming method, and computer program product
摘要 An image forming apparatus includes: a request signal generating unit that generates a predetermined timing signal and transmits a request signal for a specified number of times for requesting line-by-line image data during a time interval at which the timing signal is generated; and a memory control unit that sequentially saves, in a memory unit, line-by-line image data transmitted in response to the request signal and reads line-by-line image data saved in the memory unit to transmit the line-by-line image data to a drive control unit. Upon receiving a predetermined increase request, the request signal generating unit shifts a generation timing of the timing signal so that, during the time interval, the request signal can be transmitted for an increased number of times than the specified number of times, and gradually shortens the timing signal by a predetermined shortening time period.
申请公布号 US8817323(B2) 申请公布日期 2014.08.26
申请号 US201012881612 申请日期 2010.09.14
申请人 Ricoh Company, Limited 发明人 Ohyama Tatsuo
分类号 G06F15/00;G06F3/12;G06K1/00;G06K15/00;H04N1/32;G06K15/12;H04N1/191;H04N1/113 主分类号 G06F15/00
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. An image forming apparatus, comprising: a light source configured to emit a light beam; drive control circuitry configured to control the light source; a light receiving device configured to receive the light beam emitted by the light source; image processing circuitry configured to perform image processing on image data based on the light beam received by the light receiving device; and data control circuitry, comprising request signal generating circuitry, memory control circuitry, and a memory, the memory being configured to store image data,the request signal generating circuitry being configured to transmit a timing signal to the memory control circuitry, and to transmit a request signal to the image processing circuitry, the timing signal being regenerated at a first time interval,the request signal being generated for a first plurality of times as requests for a first plurality of line-by-line image data during the first time interval,the memory control circuitry being configured to sequentially save in the memory the requested first plurality of line-by-line image data transmitted by the image processing circuitry in response to the request signal, to read the first plurality of line-by-line image data saved in the memory, and to transmit the first plurality of line-by-line image data to the drive control circuitry, wherein, before an interruption in the first plurality of line-by-line image data transmitted to the drive control circuitry, the request signal is generated for a second plurality of times as requests for a second plurality of line-by-line image data, the second plurality of times being at least one time greater than the first plurality of times, and the second plurality of line-by-line image data being greater than the first plurality of line-by-line image data, wherein, when the request signal is generated for the second plurality of times, the regeneration of the timing signal is shifted, and the request signal generating circuitry regenerates the timing signal at a second time interval until the memory control circuitry sequentially saves in the memory the requested second plurality of line-by-line image data, the second time interval being greater than the first time interval, and wherein, after the memory control circuitry sequentially saves in the memory the requested second plurality of line-by-line image data, the request signal generating circuitry regenerates the timing signal at the second time interval, wherein a length of the second time interval is gradually shortened until the second time interval is equal to the first time interval.
地址 Tokyo JP