MOS test structure, method for forming MOS test structure and method for performing wafer acceptance test

摘要

A MOS test structure is disclosed. A scribe line region is disposed on a substrate which has a first side and a second side opposite to the first side. An epitaxial layer is disposed on the first side, the doping well is disposed on the epitaxial layer and the doping region is disposed on the doping well. A trench gate of a first depth is disposed in the doping region, in the doping well and in the scribe line region. A conductive material fills the test via which has a second depth and an isolation covering the inner wall of the test via and is disposed in the doping region, in the doping well, in the epitaxial layer and in the scribe line region, to electrically connect to the epitaxial layer so that the test via is capable of testing the epitaxial layer and the substrate together.

主权项

1. A MOS test structure, comprising:
a substrate of a first conductivity type and with a first side and a second side opposite to said first side; a scribe line region on said substrate; an epitaxial layer of said first conductivity type disposed on said first side; a doping well of a second conductivity type disposed on said epitaxial layer; a doping region of said first conductivity type disposed on said doping well; a trench gate of a first depth, disposed in said doping region, in said doping well and in said scribe line region; and a test via of a second depth and disposed in said doping region, in said doping well, in said epitaxial layer and in said scribe line region; an isolation covering an inner wall of said test via; and a conductive material filling said test via and electrically connected to said epitaxial layer so that said test via is capable of testing said epitaxial layer and said substrate together independent of the influence of an adjacent doping region and the doping well.