Structure and method for reducing floating body effect of SOI MOSFETs

摘要

The present invention generally relates to a semiconductor structure and method, and more specifically, to a structure and method for reducing floating body effect of silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). An integrated circuit (IC) structure includes a SOI substrate and at least one MOSFET formed on the SOI substrate. Additionally, the IC structure includes an asymmetrical source-drain junction in the at least one MOSFET by damaging a pn junction to reduce floating body effects of the at least one MOSFET.

主权项

1. A method of making an integrated circuit (IC) structure, comprising:
providing a silicon on insulator (SOT) substrate; forming at least one metal oxide semiconductor field effect transistor (MOSFET) on the SOI substrate; forming an asymmetrical source-drain junction in the at least one MOSFET by damaging a pn junction to reduce floating body effects of the at least one MOSFET; forming an oxide layer on the SOI substrate; depositing a poly-Si layer on the oxide layer; depositing a nitride layer on the poly-Si layer; patterning a gate by etching portions of the poly-Si layer and the nitride layer; forming spacers on sides of the gate; etching portions of the oxide layer using the nitride layer and the spacers as a mask; etching portions of an epitaxial Si layer of the SOI substrate using the nitride layer and the spacers as a mask; etching portions of an epitaxial SiGe layer of the SOI substrate using the nitride layer and the spacers as a mask; depositing a second epitaxial Si layer surrounding a remaining portion of the epitaxial SiGe layer, a remaining portion of the epitaxial Si layer and planar with an upper surface of a remaining portion of the oxide layer; etching a Si layer of the SOI substrate to expose the epitaxial SiGe layer; planarizing the epitaxial SiGe layer; etching portions of the epitaxial SiGe layer; and etching portions of the second epitaxial Si layer.