Programmable error correction capability for BCH codes

摘要

An embodiment of the invention relates to a BCH encoder formed with linear feedback shift registers (LFSRs) to form quotients and products of input polynomials with irreducible polynomials of a generator polynomial g(x) of the BCH encoder, with and without pre-multiplication by a factor xm. The BCH encoder includes multiplexers that couple LFSR inputs and outputs to other LFSRs depending on a data input or parity generation state. The BCH encoder can correct up to a selectable maximum number of errors in the input polynomials. The BCH encoder further includes LFSR output polynomial exponentiation processes to produce partial syndromes for the input data in a syndrome generation state. In the syndrome generation state the LFSRs perform polynomial division without pre-multiplication by the factor xm. The exponentiation processes produce partial syndromes from the resulting remainder polynomials of the input data block.

主权项

1. A circuit comprising:
a plurality of programmable linear feedback shift register (LFSR) circuits, each programmable LFSR circuit comprising:
a first number of registers coupled in series;one or more coefficient elements coupled between a first node and an input of a corresponding register; anda first multiplexer comprising an output coupled to the first node, a first input coupled to an input node of the programmable LFSR circuit, and second input coupled to an output node of the programmable LFSR circuit, anda summing circuit having a first input coupled to the input node of the programmable LFSR circuit, a second input coupled to an output register of the first number of registers, and an output coupled to both the output node of the programmable LFSR circuit and the second input of the first multiplexer.