发明名称 Method and apparatus for synthesizing a low phase noise frequency with wide tuning range
摘要 Direct digital frequency synthesis is the process by which a digital frequency synthesizer component may output a stable, precise clock frequency at any of a broad range of possible frequency output values for any number of applications, usually across an integrated circuit. The digital frequency synthesizer set forth in this disclosure is a combination of a controller configured to receive a frequency control word and generate a first frequency control sub-word and a second frequency control sub-word based on the frequency control word, a frequency generator configured to generate a source frequency within a first predetermined frequency range based on the first frequency control sub-word, and a variable frequency divider configured to generate an output frequency within a second predetermined range based on the second frequency control sub-word and the source frequency.
申请公布号 US8810286(B1) 申请公布日期 2014.08.19
申请号 US201313875829 申请日期 2013.05.02
申请人 Mstar Semiconductor, Inc. 发明人 Muhammad Khurram;Hung Chih-Ming
分类号 H03K19/082;H03K19/094;H03L7/16 主分类号 H03K19/082
代理机构 Oliff PLC 代理人 Oliff PLC
主权项 1. A digital frequency synthesizer, comprising: a controller configured to receive a frequency control word and generate a first frequency control sub-word and a second frequency control sub-word based on the frequency control word; a frequency generator configured to generate a source frequency within a first predetermined frequency range based on the first frequency control sub-word; and a variable frequency divider configured to generate an output frequency within a second predetermined frequency range based on the second frequency control sub-word and the source frequency, wherein the first predetermined frequency range is defined as + or −X % of the source frequency fsrc, the second predetermined frequency range is defined by (64*fsrc−fsrc), and a ratio of the second predetermined frequency range to the first predetermined frequency range is (64*fsrc−fsrc)/(fsrc+ or −X %)=31.5/X %.
地址 Hsinchu TW