发明名称 Method of dispatching and transmitting data streams, memory controller and storage apparatus
摘要 A method of dispatching and transmitting data stream, which is used for a memory storage apparatus having a non-volatile memory module and a smart card chip, is provided. The method includes configuring a plurality of logical block addresses, and a plurality of specific logical block addresses are used for storing a specific file. The method also includes receiving a response data unit from the smart card chip and storing the response data unit in a buffer memory. The method also includes, when a logical block address corresponding to a read command from a host system belongs to one of the specific logical block addresses and the buffer memory stores a response data unit, transmitting the response data unit stored in the buffer memory to the host system. Accordingly, the method can make the host system to correctly receive the response data unit from the smart card chip.
申请公布号 US8812756(B2) 申请公布日期 2014.08.19
申请号 US201012895872 申请日期 2010.10.01
申请人 Phison Electronics Corp. 发明人 Chang Ching-Wen
分类号 G06F3/00;G06F13/00;G06F5/00;G06F13/12;G06F12/00;G06F21/60;G06F21/79 主分类号 G06F3/00
代理机构 Jianq Chyun IP Office 代理人 Jianq Chyun IP Office
主权项 1. A method of dispatching and transmitting data streams, for a memory storage apparatus having a non-volatile memory module and a smart card chip, the method comprising: configuring a plurality of logical block addresses for the non-volatile memory module, wherein a plurality of specific logical block addresses among the logical block addresses store a specific file; receiving a response data unit from the smart card chip and storing the response data unit in a buffer memory, wherein the response data unit is a responses-application protocol data unit; receiving a read command from a host system; determining whether a logical block address corresponding to the read command belongs to any one of the specific logical block addresses and determining whether the buffer memory stores the response data unit; adding a plurality of pad bits subsequent to the response data unit stored in the buffer memory and transmitting the response data unit stored in the buffer memory and the subsequent pad bits to the host system in response to the read command if the logical block address corresponding to the read command belongs to one of the specific logical block addresses and the buffer memory stores the response data unit; adding the pad bits subsequent to a second data stream not requested by the read command and transmitting the second data stream and the subsequent pad bits to the host system in response to the read command if the logical block address corresponding to the read command belongs to one of the specific logical block addresses and the buffer memory does not store the response data unit, wherein a bit length of the pad bits is greater than a bit length of the response data unit and a bit length of the second data stream; receiving a write command and a first data stream corresponding to the write command from the host system; determining whether the first data stream contains a specific mark; and if the first data stream contains the specific mark, transmitting a command data unit among the first data stream to the smart card chip and deleting the response data unit stored in the buffer memory in response to the write command.
地址 Miaoli TW