发明名称 |
Methods for forming FinFETs having multiple threshold voltages |
摘要 |
A method includes forming a first and a second gate stack to cover a first and a second middle portion of a first and a second semiconductor fin, respectively, and performing implantations to implant exposed portions of the first and the second semiconductor fins to form a first and a second n-type doped region, respectively. A portion of each of the first and the second middle portions is protected from the implantations. The first n-type doped region and the second n-type doped region have different gate proximities from edges of the first gate stack and the second stack, respectively. The first and the second n-type doped regions are etched using chlorine radicals to form a first and a second recess, respectively. An epitaxy is performed to re-grow a first semiconductor region and a second semiconductor region in the first recess and the second recess, respectively. |
申请公布号 |
US8809171(B2) |
申请公布日期 |
2014.08.19 |
申请号 |
US201313748419 |
申请日期 |
2013.01.23 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Xu Jeffrey Junhao;Zhang Ying;Fang Ziwei |
分类号 |
H01L21/425 |
主分类号 |
H01L21/425 |
代理机构 |
Slater and Matsil, L.L.P. |
代理人 |
Slater and Matsil, L.L.P. |
主权项 |
1. A method comprising:
forming a first gate stack to cover a first middle portion of a first semiconductor fin; forming a second gate stack to cover a second middle portion of a second semiconductor fin; performing a first implantation to implant an exposed portion of the first semiconductor fin with an n-type impurity to form a first n-type doped region, wherein a portion of the first middle portion is protected by the first gate stack from receiving the n-type impurity; performing a second implantation to implant an exposed portion of the second semiconductor fin with an additional n-type impurity to form a second n-type doped region, wherein a portion of the second middle portion is protected by the second gate stack from receiving the additional n-type impurity, and wherein the first n-type doped region and the second n-type doped region have different gate proximities from edges of the first gate stack and the second stack, respectively; etching the first n-type doped region using chlorine radicals to form a first recess; etching the second n-type doped region using the chlorine radicals to form a second recess; and performing an epitaxy to re-grow a first semiconductor region and a second semiconductor region in the first recess and the second recess, respectively. |
地址 |
Hsin-Chu TW |