发明名称 PROCESS FOR IMPROVING PACKAGE WARPAGE AND CONNECTION RELIABILITY THROUGH USE OF A BACKSIDE MOLD CONFIGURATION (BSMC)
摘要 A backside mold configuration (BSMC) process for manufacturing packaged integrated circuits includes applying a mold compound to a side of a packaging substrate opposite an attached die. The mold compound is deposited on a dielectric (such as photo resist). The mold compound and dielectric are patterned after coupling a die to the packaging substrate to expose a contact pad of the packaging substrate. After patterning the mold compound and dielectric, a packaging connection is coupled to contact pads through the mold compound and dielectric. The mold compound surrounding the packaging connection reduces warpage of the packaging substrate during processing. Additionally, patterning the dielectric after attaching the die improves reliability of the packaging connection.
申请公布号 US2014227835(A1) 申请公布日期 2014.08.14
申请号 US201414255349 申请日期 2014.04.17
申请人 QUALCOMM INCORPORATED 发明人 Bchir Omar James;Shah Milind Pravin;Movva Sashidhar
分类号 H01L21/56;H01L23/00 主分类号 H01L21/56
代理机构 代理人
主权项 1. An integrated circuit (IC) packaging method, comprising: providing a substrate having a dielectric on a first side of the substrate; depositing first mold compound on the dielectric; attaching a die to a second side of the substrate opposite the first side of the substrate; depositing second mold compound to the second side of the substrate to surround the die; and depositing a packaging connection on the first side of the substrate that couples to a contact pad of the substrate through the first mold compound and the dielectric.
地址 SAN DIEGO CA US