LATERAL SUPER JUNCTION DEVICE WITH HIGH SUBSTRATE-GATE BREAKDOWN AND BUILT-IN AVALANCHE CLAMP DIODE

摘要

A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.

主权项

1. A method of forming a semiconductor power device comprising:
forming a bottom semiconductor layer of a first conductivity type, and an intermediate semiconductor layer of a second conductivity type below said super junction structure and above said bottom semiconductor layer followed by forming a super junction structure near a top surface of a semiconductor substrate by forming stacking laterally layers of alternating conductivity types of a first and second conductivity type; forming a gate column of a second conductivity type extending down through the super junction structure; forming a source column and a drain column of a first conductivity type extending through the super junction structure with the drain column extending through the super junction structure and electrically connected to the bottom semiconductor layer.