发明名称 Nonvolatile semiconductor memory device
摘要 A nonvolatile semiconductor memory device according to an embodiment comprises: a memory cell array including a plurality of memory cells provided at each of intersections of a plurality of first lines and a plurality of second lines; and a control circuit applying a selected first line voltage to a selected first line, an adjacent unselected first line voltage which is larger than the selected first line voltage to an adjacent unselected first line, and an unselected first line voltage which is larger than the adjacent unselected first line voltage to an unselected first line, and applying a selected second line voltage which is larger than the selected first line voltage to a selected second line and an unselected second line voltage which is smaller than the selected second line voltage to an unselected second line.
申请公布号 US8804402(B2) 申请公布日期 2014.08.12
申请号 US201213722210 申请日期 2012.12.20
申请人 Kabushiki Kaisha Toshiba 发明人 Minemura Yoichi;Tsukamoto Takayuki;Kanno Hiroshi;Okawa Takamasa
分类号 G11C13/00 主分类号 G11C13/00
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A nonvolatile semiconductor memory device, comprising: a memory cell array including a plurality of first lines and a plurality of second lines that intersect one another, and a plurality of memory cells provided at each of intersections of the plurality of first lines and the plurality of second lines; and a control circuit for applying a voltage to the plurality of first lines and the plurality of second lines, each of the memory cells including a variable resistance element and a rectifier element connected in series, and having one of the first lines connected to an anode side of said rectifier element and one of the second lines connected to a cathode side of said rectifier element, and, when it is assumed that one of the memory cells which is to be an access target is a selected memory cell, one of the first lines connected to the selected memory cell is a selected first line, one of the first lines adjacent to the selected first line is an adjacent unselected first line, a remaining one of the first lines is an unselected first line, one of the second lines connected to the selected memory cell is a selected second line, and a remaining one of the second lines is an unselected second line, the control circuit applying a selected first line voltage to the selected first line, an adjacent unselected first line voltage which is larger than the selected first line voltage to the adjacent unselected first line, and an unselected first line voltage which is larger than the adjacent unselected first line voltage to the unselected first line, and applying a selected second line voltage which is larger than the selected first line voltage to the selected second line and an unselected second line voltage which is smaller than the selected second line voltage to the unselected second line.
地址 Tokyo JP
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