发明名称 |
Semiconductor device and method for manufacturing the same |
摘要 |
A trench gate type MISFET and a diode are formed in a semiconductor substrate. First and second trenches are formed in the semiconductor substrate. A gate electrode is formed in the first trench through a gate insulating film. A dummy gate electrode is formed in the second trench through a dummy gate insulating film. A cathode n+-type semiconductor region and an anode p-type semiconductor region are formed in the semiconductor substrate and the second trench is formed so as to surround the n+-type semiconductor region in a planar view. A part of the anode p-type semiconductor region is formed directly below the n+-type semiconductor region, so that a PN junction is formed between the part of the anode p-type semiconductor region and the n+-type semiconductor region. Thereby a diode is formed. The dummy gate electrode is electrically coupled to one of an anode and a cathode. |
申请公布号 |
US8803226(B2) |
申请公布日期 |
2014.08.12 |
申请号 |
US201313766148 |
申请日期 |
2013.02.13 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Katou Hiroaki;Moriya Taro;Kudou Hiroyoshi;Uchiya Satoshi |
分类号 |
H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
Sughrue Mion, PLLC |
代理人 |
Sughrue Mion, PLLC |
主权项 |
1. A semiconductor device including a trench gate type field effect transistor and a diode which are formed in a semiconductor substrate, the semiconductor device comprising:
a first trench and a second trench which are formed in the semiconductor substrate; a gate electrode of the trench gate type field effect transistor, the gate electrode being formed in the first trench through a gate insulating film; a conductive material formed in the second trench through a first insulating film; and a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type opposite to the first conductivity type which are used for the diode and formed in the semiconductor substrate, wherein the second trench is formed so as to surround the second semiconductor region in a planar view, wherein a part of the first semiconductor region is formed directly below the second semiconductor region, wherein a PN junction is formed between the second semiconductor region and the part of the first semiconductor region located directly below the second semiconductor region, and thereby the diode is formed, and wherein the conductive material is electrically coupled to one of the first semiconductor region and the second semiconductor region. |
地址 |
Kanagawa JP |