| 发明名称 |
SMART BRIDGE FOR MEMORY CORE |
| 摘要 |
An apparatus includes a semiconductor device that includes a three-dimensional (3D) memory. The 3D memory includes multiple memory cells arranged in multiple physical levels above a substrate. The 3D memory includes circuitry associated with operation of the multiple memory cells and includes a serializer/deserializer interface. |
| 申请公布号 |
US2014218996(A1) |
申请公布日期 |
2014.08.07 |
| 申请号 |
US201414246548 |
申请日期 |
2014.04.07 |
| 申请人 |
SANDISK TECHNOLOGIES INC. |
发明人 |
D'ABREU MANUEL ANTONIO;SKALA STEPHEN;PANTELAKIS DIMITRIS;NAIR RADHAKRISHNAN;PANCHOLI DEEPAK |
| 分类号 |
G11C5/02 |
主分类号 |
G11C5/02 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a semiconductor device including a three-dimensional (3D) memory that includes multiple memory cells arranged in multiple physical levels above a substrate, wherein the 3D memory includes circuitry associated with operation of the multiple memory cells, and wherein the 3D memory includes a serializer/deserializer interface. |
| 地址 |
Plano TX US |
