发明名称 Method and apparatus for testing high capacity/high bandwidth memory devices
摘要 A plurality of stacked memory device die and a logic circuit are connected to each other through a plurality of conductors. The stacked memory device die are arranged in a plurality of vaults. The logic circuit die serves as a memory interface device to a memory access device, such as a processor. The logic circuit die includes a plurality of link interfaces and downstream targets for transmitting received data to the vaults. The logic circuit die includes a packet builder and broadcaster configured to receive command, address and data signals over separate interfaces from a conventional tester, format the signals into a packet and broadcast the signals to a plurality of vaults.
申请公布号 US8799726(B2) 申请公布日期 2014.08.05
申请号 US201113180301 申请日期 2011.07.11
申请人 Micron Technology, Inc. 发明人 Jeddeloh Joseph M.
分类号 G11C29/00;G11C29/56;G11C29/26 主分类号 G11C29/00
代理机构 Dorsey & Whitney LLP 代理人 Dorsey & Whitney LLP
主权项 1. A method of testing a plurality of stacked memory device dice coupled to a logic circuit die and being configured for access according to a plurality of vaults, the method comprising: receiving, at the logic circuit die, a write command signal from a first unidirectional interface, a first address signal from a second unidirectional interface, and write data from a bidirectional interface; combining the write command, the first address signal, and the write data into a write packet; broadcasting the write packet to the plurality of the vaults; writing the write data to a location corresponding to the first address signal in each of the plurality of the vaults; receiving at the logic circuit die a read command signal and a second address signal from the respective separate interfaces; combining at least the read command and the second address signal into a read packet; broadcasting the read packet to the plurality of the vaults; receiving read data corresponding to the second address signal from each of the plurality of the vaults; reformatting the read data in a manner expected by a tester; and outputting the reformatted data to the bidirectional interface including an indication of whether any of the vaults provided read data differing from read data provided by any of the other plurality of vaults.
地址 Boise ID US
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