发明名称 |
Matching signal dynamic range for turbo equalization system |
摘要 |
A method for reducing a number of bits for representing a value is disclosed. A first value represented with a first number of bits is transformed to a second value represented with a second number of bits, wherein the first number of bits is greater than the second number of bits. The transformed second value is scaled by a scale factor to a third value. Transforming includes selecting a target window with a width of a third number of bits, wherein the third number of bits is smaller than the first number of bits. Transforming further includes saturating the first value to a most significant bit (MSB) within the selected target window and extracting bits within the selected target window from the saturated value. |
申请公布号 |
US8799752(B2) |
申请公布日期 |
2014.08.05 |
申请号 |
US201314073577 |
申请日期 |
2013.11.06 |
申请人 |
SK hynix memory solutions inc. |
发明人 |
Kou Yu;Zeng Lingqi |
分类号 |
H03M13/25;H04L27/01;H03M13/29;H03M13/53;H04L1/00 |
主分类号 |
H03M13/25 |
代理机构 |
Van Pelt, Yi & James LLP |
代理人 |
Van Pelt, Yi & James LLP |
主权项 |
1. A method for reducing a number of bits for representing a value, comprising:
transforming by a processor a first value represented with a first number of bits to a second value represented with a second number of bits, wherein the first number of bits is greater than the second number of bits, comprising:
selecting a target window with a width of a third number of bits, wherein the third number of bits is smaller than the first number of bits, and wherein the target window comprises a window of consecutive bits not including the least significant bit; and scaling by the processor the transformed second value by a scale factor to a third value. |
地址 |
San Jose CA US |