Variable gain amplifier

摘要

A method may include applying an input differential voltage to input terminals of an amplifier, a first input terminal coupled to a gate of a first transistor and a second input terminal coupled to a gate of a second transistor. The method may also include varying a gain of the amplifier by varying at least one of: a resistance of a first resistor, the first resistor coupled between a source of the first transistor and a source of the second transistor; and a resistance of a second resistor, the second resistor coupled between a source of a third transistor and a source of a fourth transistor; wherein: the third transistor is coupled at its drain to the drain of the first transistor; and the fourth transistor is coupled at its drain to the drain of the second transistor and a gate of the third transistor and coupled at its gate to the drain of the third transistor.

主权项

1. An amplifier, comprising:
a first stage comprising:
a first transistor coupled at its gate terminal to a first input terminal of the amplifier;a second transistor coupled at its gate terminal to a second input terminal of the amplifier, the first input terminal and the second input terminal comprising a differential voltage input;a first resistor coupled between a drain terminal of the first transistor and a high potential voltage source;a second resistor coupled between a drain terminal of the second transistor and the high potential voltage source;a first current source coupled to a source terminal of the first transistor;a second current source coupled to a source terminal of the second transistor; anda first variable resistor coupled between the source terminal of the first transistor and the source terminal of the second transistor; and a second stage comprising:
a third transistor directly coupled at its drain terminal to the drain terminal of the first transistor;a fourth transistor directly coupled at its drain terminal to the drain terminal of the second transistor, coupled at its gate terminal to the drain terminal of the third transistor, and coupled at its drain terminal to a gate terminal of the third transistor;a third current source coupled to a source terminal of the third transistor;a fourth current source coupled to a source terminal of the fourth transistor; anda second variable resistor coupled between the source terminal of the third transistor and the source terminal of the fourth transistor.