发明名称 Cache memory capable of adjusting burst length of write-back data in write-back operation
摘要 A cache memory includes a write-back determination unit and a burst length determination unit. The write-back determination unit determines whether a block is a write-back block based on an n-bit dirty value of the block. The burst length determination unit determines a burst length of write-back data included in the write-back block based on the n-bit dirty value and an minimum burst length, when the block is the write-back block.
申请公布号 US8799585(B2) 申请公布日期 2014.08.05
申请号 US201313893746 申请日期 2013.05.14
申请人 Samsung Electronics Co., Ltd. 发明人 Lee Kil Whan;Chung Young Jin
分类号 G06F13/00 主分类号 G06F13/00
代理机构 Onello & Mello, LLP 代理人 Onello & Mello, LLP
主权项 1. A cache memory comprising: a write-back determination unit determining whether a block is a write-back block based on replacement information on the block; a burst length determination unit determining a burst length of write-back data included in the write-back block based on a number of effective bits of a n-bit dirty value, an order of the effective bits with respect to non-effective bits of the n-bit dirty value, wherein each bit is in direct correlation with an updated block to be written back, and a minimum burst length, when the block is the write-back block; and a processor outputting a first output signal for controlling a data storing unit to output the write-back data in response to the determined burst length and outputting a second output signal for performing a read operation to a system bus.
地址 KR