发明名称 |
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE |
摘要 |
The present invention provides a method of manufacturing a semiconductor device having a memory cell of high reliability. After the first and the second stack structure (PE1, PE2) of a memory cell formation region has a height which is higher than that of the third stack structure (PE3) of a peripheral transistor formation region, an interlayer dielectric layer (II) is formed to cover them. A polishing process is carried out. |
申请公布号 |
KR20140095986(A) |
申请公布日期 |
2014.08.04 |
申请号 |
KR20140007961 |
申请日期 |
2014.01.22 |
申请人 |
RENESAS ELECTRONICS CORPORATION |
发明人 |
TSUKUDA EIJI;KATAYAMA KOZO;SONODA KENICHIRO;KUNIKIYO TATSUYA |
分类号 |
H01L21/8247;H01L27/115 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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