LAYOUT DECOMPOSITION METHOD AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE APPLYING THE SAME

摘要

A layout decomposition method and a method for manufacturing a semiconductor device applying the same are provided. According to the layout decomposition method, a design layout is received by the logic processor of a computing system. A design rule for layout decomposition is then identified by the logic processor, including identifying dense areas (areas with densely distributed features) on a substrate, and identifying areas with odd-numbered features on the substrate. Next, a first mask with a first pattern and a second mask with a second pattern are generated corresponding to results of design rule identification by the computing system for fabricating patterns of features in at least two of the areas with odd-numbered features in one of the dense areas.

主权项

1. A layout decomposition method, executed by a logic processor of a computing system, comprising:
receiving a design layout by the logic processor; identifying a design rule for layout decomposition by the logic processor, comprising:
identifying a plurality of dense areas on a substrate; andidentifying areas with odd-numbered features on the substrate; and generating a first mask with a first pattern and a second mask with a second pattern corresponding to results of design rule identification by the computing system for fabricating patterns of features in at least two of the areas with odd-numbered features in one of the dense areas.