发明名称 |
Semiconductor integrated circuit and method of reducing power consumption |
摘要 |
A semiconductor integrated circuit includes a logic circuit having a plurality of operation modes, a power source circuit that generates a power source voltage to be supplied to the logic circuit, a power source wiring that couples the power source circuit and the logic circuit, and a charge control block that holds charges for controlling the voltage of the power source wiring. The power source circuit generates a first power source voltage for causing the logic circuit to operate in a computing mode and a second power source voltage for causing the logic circuit to operate in a sleep mode. The charge control block includes a capacitor, a first switch, and a voltage supply unit that supplies the second power source voltage or a third power source voltage lower than the second power source voltage, to the capacitor. |
申请公布号 |
US8791751(B2) |
申请公布日期 |
2014.07.29 |
申请号 |
US201313749577 |
申请日期 |
2013.01.24 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Ueki Makoto;Inoue Naoya;Hayashi Yoshihiro |
分类号 |
G05F1/10 |
主分类号 |
G05F1/10 |
代理机构 |
McGinn IP Law Group, PLLC |
代理人 |
McGinn IP Law Group, PLLC |
主权项 |
1. A semiconductor integrated circuit comprising:
a logic circuit having a computing mode that is an operation mode when computing is performed, and a sleep mode that is an operation mode when the computing is suspended; a power source circuit that generates a power source voltage to be supplied to the logic circuit; a power source wiring that couples the power source circuit and the logic circuit; and a charge control block that holds charges for controlling the voltage of the power source wiring, wherein the power source circuit generates a first power source voltage for operating the logic circuit in the computing mode and a second power source voltage for operating the logic circuit in the sleep mode, and wherein the charge control block includes:
a capacitor;a first switch provided between one end of the capacitor and the power source wiring; anda voltage supply unit that supplies the second power source voltage or a third power source voltage lower than the second power source voltage, to the other end of the capacitor. |
地址 |
Kawasaki-shi, Kanagawa JP |