发明名称 |
Wafer backside interconnect structure connected to TSVs |
摘要 |
An integrated circuit structure includes a semiconductor substrate having a front surface and a back surface; a conductive via passing through the semiconductor substrate; and a metal feature on the back surface of the semiconductor substrate. The metal feature includes a metal pad overlying and contacting the conductive via, and a metal line over the conductive via. The metal line includes a dual damascene structure. The integrated circuit structure further includes a bump overlying the metal line. |
申请公布号 |
US8791549(B2) |
申请公布日期 |
2014.07.29 |
申请号 |
US201012832019 |
申请日期 |
2010.07.07 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Chen Ming-Fa;Chiou Wen-Chih;Shue Shau-Lin |
分类号 |
H01L29/40;H01L23/48;H01L23/52 |
主分类号 |
H01L29/40 |
代理机构 |
Slater and Matsil, L.L.P. |
代理人 |
Slater and Matsil, L.L.P. |
主权项 |
1. An integrated circuit structure comprising:
a semiconductor substrate having an active semiconductor device formed on a first side of the semiconductor substrate; a conductive via passing through the semiconductor substrate; a metal feature on a second side of the semiconductor substrate opposing the first side of the semiconductor substrate, the metal feature comprising:
a metal pad overlying and contacting the conductive via, wherein from a top-down perspective, all horizontal dimensions of the metal pad are greater than respective horizontal dimensions of the conductive via; anda metal line higher than the conductive via, relative the second side of the semiconductor substrate, wherein the metal line comprises a dual damascene structure; and a bump overlying the metal line. |
地址 |
Hsin-Chu TW |