| 摘要 |
PROBLEM TO BE SOLVED: To generate a clock signal of 256 fs having a constant time interval from a signal rise to the next signal rise from a clock signal of 192 fs.SOLUTION: An input clock signal CK1 with a constant duty ratio is doubled in frequency to generate a clock signal CK2. From the clock signal CK2, a clock signal CK4 with a duty ratio of 2/3 having "H" over two clocks of the clock signal CK2 and next "L" over one clock is generated. The clock signal CK4 is delayed by one and a half clocks of the clock signal CK2 to generate a clock signal CK6. An inverted signal of the clock signal CK6 and the clock signal CK4 are subjected to an exclusive OR operation to generate a clock signal CK8. |
