发明名称 |
VARIABLE DELAY AND SETUP TIME FLIP-FLOP |
摘要 |
An apparatus is provided. The apparatus includes a flip-flop including an input configured to receive a setup time and delay control (SDC) signal, and an output buffer including first and second conductive paths. The second conductive path is non-conductive when the SDC signal has a first value at the input and is conductive when the SDC signal has a second value at the input. The apparatus includes a propagation delay sensor configured to estimate a propagation delay of the flip-flop, and, when the estimated propagation delay exceeds a threshold, supply the SDC signal having the second value to the input of the flip-flop. |
申请公布号 |
US2014203857(A1) |
申请公布日期 |
2014.07.24 |
申请号 |
US201313749542 |
申请日期 |
2013.01.24 |
申请人 |
ALLENDE ALEXANDRO GIRON |
发明人 |
ALLENDE ALEXANDRO GIRON |
分类号 |
H03K3/037 |
主分类号 |
H03K3/037 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus, comprising:
a flip-flop including:
an input configured to receive a setup time and delay control (SDC) signal, andan output buffer including first and second conductive paths, the second conductive path being non-conductive when the SDC signal has a first value at the input and being conductive when the SDC signal has a second value at the input; a propagation delay sensor configured to:
estimate a propagation delay of the flip-flop, andwhen the estimated propagation delay exceeds a threshold, supply the SDC signal having the second value to the input of the flip-flop. |
地址 |
Zapopan MX |